MV1442DPAS 查看數據表（PDF） - Zarlink Semiconductor Inc
零件编号
产品描述 (功能)
生产厂家
MV1442DPAS Datasheet PDF : 12 Pages
| |||
MV1442
Pin
Signal name
Description
10
CRYSTAL IN
Input to crystal oscillator amplifier when in internal clock regeneration mode with the
crystal connected between pins 10 and 12. Alternatively this pin may be used as the 16384/
12.352MHz input to the internal clock regeneration circuitry if one oscillator is shared
between several decoders. This pin has no function when external clock regeneration is
selected and should in that case be tied to GND.
11 DOUBLE VIOLATION Output from the error detector circuit. This output goes high for one period of Decoder clock
one period after the detection of an HDB3 violation of the same polarity as the previous
HDB3 violation.
12 CRYSTAL OUT/CDR In external clock regeneration mode, this pin is used to output the OR function of the two
HDB3 inputs RXD1 and RXD2 (or TXD1 and TXD2) if loop test mode is selected; to an
external clock regeneration circuit in internal clock regeneration mode. This is the output
which forms the crystal oscillator with pin 10.
13
RXD1
HDB3 input to Decoder block. This input asynchronously latches the incoming HDB3
encoded data and is falling edge sensitive.
14 LOOP TEST ENABLE Input pin for selection of normal or loop back operation. A logic ‘0’ on this pin selects
normal operation with encoder and decoder being independent and asynchronous. A
logic ‘1’ on this pin internally connects TXD1 to RXD1 and TXD2 to RXD2. Note that
in loop back mode a decoder clock must be supplied (or regenerated from pin 12 along
with the encoder clock.
15
RXD2
HDB3 input 2 to Decoder block. See pin 13 description.
16
TXD1
HDB3 encoded output from Encoder block. This output goes high after the rising edge of
clock if a mark is to be transmitted. The length of the pulse is set by the positive clock puIse
width.
17
TXD2
HDB3 encoded output 2. See pin 16 description.
18
VDD
Digital supply voltage. 5V±10%.
Table 1 - Pin descriptions (continued)
Electrical Characteristics
TAMB = -40°C to +85°C, VDD = +5V±0·5V
These Characteristics are guaranteed by either production test or design. They apply within the specified ambient
temperature and supply voltage ranges unless otherwise stated.
Static Characteristics
Characteristic
Symbol
Value
Units
Min. Typ. Max.
Conditions
Low level input voltage
High level input voltage
Low level output voltage
High level output voltage
Input leakage current
Supply current (note 1)
VIL
VIH
VOL
VOHT
VOHC
IIN
IDD
0
2
2·4
VDD21
-10
0·8 V
VDD
V
0·4
V ISINK = 2mA
V
ISOURCE = 2mA
V
ISOURCE = 1mA
+200 µA VIN = VDD or GND
15 mA 1.544/2.048MHz, with internal clock regeneration
5 mA 1.544/2.048MHz, with external clock regeneration
15 mA 8.448MHz operation
Input capacitance
CIN
5
pF All inputs
Output capacitance
COUT
5
pF All outputs
NOTES
1. All supply currents are specified with outputs unloaded. These currents are not tested but are guaranteed by characterisation and
a static current test.
5
Share Link: 