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M65P100F1

65A, 1000V P-Type MOS Controlled Thyristor (MCT)

Intersil 

MCTV65P100F1,

Semiconductor

April 1999

MCTA65P100F1 PROCESS

OPABRSTOLWEITTEHD- RNAOWNNEW

DESIGNS

P-Type

MOS

Controlled

65A,

Thyristor

1000V

(MCT)

Features

• 65A, -1000V

• VTM ≤ -1.4V at I = 65A and +150oC

• 2000A Surge Current Capability

• 2000A/µs di/dt Capability

• MOS Insulated Gate Control

• 100A Gate Turn-Off Capability at +150oC

Package

JEDEC STYLE TO-247

CATHODE (FLANGE)

ANODE ANODE

CATHODE

GATE RETURN

GATE

Description

The MCT is an MOS Controlled Thyristor designed for switching

currents on and off by negative and positive voltage control of an

insulated MOS gate. It is designed for use in motor controls,

inverters, line switches and other power switching applications.

JEDEC MO-093AA (5-LEAD TO-218)

ANODE ANODE

CATHODE

GATE RETURN

GATE

The MCT is especially suited for resonant (zero voltage or zero

current switching) applications. The SCR like forward drop

greatly reduces conduction power loss.

MCTs allow the control of high power circuits with very small

amounts of input energy. They feature the high peak current

capability common to SCR type thyristors, and operate at junc-

tion temperatures up to +150oC with active switching.

PART NUMBER INFORMATION

Symbol

CATHODE (FLANGE)

GA

PART NUMBER

PACKAGE

BRAND

MCTV65P100F1 TO-247

M65P100F1

MCTA65P100F1 MO-093AA

M65P100F1

K

NOTE: When ordering, use the entire part number.

Formerly TA9900.

Absolute Maximum Ratings TC = +25oC, Unless Otherwise Specified

MCTV65P100F1

MCTA65P100F1

Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDRM

Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRRM

Continuous Cathode Current (See Figure 2)

TC = +25oC (Package Limited) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IK25

TC = +90oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IK90

Non-Repetitive Peak Cathode Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ITSM

Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ITC

Gate-Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA

Gate-Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA

Rate of Change of Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dv/dt

-1000

+5

85

65

2000

100

±20

±25

See Figure 11

Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . di/dt

2000

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT

208

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.67

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG

Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

(0.063" (1.6mm) from case for 10s)

-55 to +150

260

NOTE:

1. Maximum Pulse Width of 200µs (Half Sine) Assume TJ (Initial) = +90oC and TJ (Final) = TJ (Max) = +150oC

UNITS

V

V

A

A

A

A

V

V

A/µs

W

W/oC

oC

oC

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.

Copyright © Harris Corporation 1999

2-13

File Number 3516.5

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