NCP1034
VOUT
R1
−
OTA
+
R2
Vref
RC1
CC1
CC2*
*Optional
Figure 27. PI compensation (II Type)
RC1
+
2
@
p @ f0 @ L @
ESR @ VIN
VRAMP @ VOUT
@ Vref @ gm
CC1
+
0.75
@
2
@
1
p@
fP0
@
RC1
CC2
+
p
@
1
RC1
@
fS
R1 + VOUT * Vref @ R2
Vref
(eq. 21)
VRAMP is the peak−to−peak voltage of the oscillator ramp
and gm is the transconductance error amplifier gain.
Capacitor CC2 is optional.
Compensation Type III (PID)
Tantalum and ceramics capacitors have lower ESR than
electrolytic, so the zero of the output LC filter goes to a
higher frequency above the zero crossover frequency. This
situation needs to be compensated by the PID compensation
network that is show in Figure 28.
V OUT
C C2
R FB1
R1
C FB1
R C1 C C1
−
OTA
+
R 2 V REF
Figure 28. PID Compensation (III Type)
There are two methods to select the zeros and poles of
compensation network. The first one (method I) is useable
for tantalum output capacitors, which have a higher ESR
than ceramic, and its zeros and poles can be calculated
shown below:
fZ1 + 0.75 @ fP0
fZ2 + fP0
fP2 + fZ0
fP3
+
fS
2
(eq. 22)
The second one (method II) is for ceramic capacitors:
Ǹ fZ2 + f0 @
1 * sin qmax
1 ) sin qmax
Ǹ fP2 + f0 @
1 ) sin qmax
1 * sin qmax
(eq. 23)
fZ1 + 0.5 @ fZ2
fP3 + 0.5 @ fS
The remaining calculations are the same for both methods.
RC1
uu
2
gm
CC1
+
2
@
p
@
1
fZ1
@
RC1
CC2
+
2
@
p
@
1
fP3
@
RC1
CFB1
+
2
@
p
@
f0
@ L @ VRAMP
VIN @ RC1
@
COUT
RFB1
+
2p
@
1
CFB1
@
fP2
(eq. 24)
R1
+
2
@
p
@
1
CFB1
@
fZ2
*
RFB1
R2 +
Vref
@ R1
VOUT * Vref
To check the design of this compensation network, the
equation must be true
R1
@
R1 @ R2 @ RFB1
RFB1 ) R2 @ RFB1 @
R1
@
R2
u
1
gm
(eq. 25)
If it is not true, then a higher value of RC1 must be selected.
Input Power Supply
The NCP1034 controller and built−in drivers need to be
powered through VCC, DRVVCC and Vb pins with a voltage
between 10 V – 18 V. The supply current requirement is a
summation of the static and dynamic currents. Static current
consumption can be calculated by the following equation:
ICS + ICC ) IC ) IB
(eq. 26)
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