UPD78064BGC(A)-XXX-8EU 查看數據表（PDF） - NEC => Renesas Technology
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UPD78064BGC(A)-XXX-8EU Datasheet PDF : 66 Pages
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µPD78064B(A)
3.2 Non-port Pins (1/2)
Pin Name
I/O
Function
After Reset
INTP0
Input
INTP1
INTP2
INTP3
INTP4
INTP5
SI0
Input
SI2
SO0
Output
SO2
SB0
SB1
Input/
output
SCK0
SCK2
Input/
output
RxD
Input
TxD
Output
ASCK
Input
TI00
Input
TI01
TI1
TI2
TO0
Output
TO1
TO2
PCL
Output
BUZ
Output
S0 to S23 Output
S24 to S31
S32 to S39
COM0 to COM3 Output
VLC0 to VLC2 —
BIAS
—
External interrupt request input by which the effective edge (rising
edge, falling edge, or both rising edge and falling edge) can be
specified.
Serial interface serial data input.
Serial interface serial data output.
Serial interface serial data input/output.
Serial interface serial clock input/output.
Asynchronous serial interface serial data input.
Asynchronous serial interface serial data output.
Asynchronous serial interface serial clock input.
External count clock input to 16-bit timer (TM0).
Capture trigger signal input to capture register (CR00).
External count clock input to 8-bit timer (TM1).
External count clock input to 8-bit timer (TM2).
16-bit timer (TM0) output (shared with 14-bit PWM output).
8-bit timer (TM1) output.
8-bit timer (TM2) output.
Clock output (for main system clock, subsystem clock trimming).
Buzzer output.
LCD controller/driver segment signal output.
LCD controller/driver common signal output.
LCD drive voltage. Split resistors can be incorporated by mask option.
LCD drive power supply.
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Input
Output
—
—
Alternate
function
P00/TI00
P01/TI01
P02
P03
P04
P05
P25/SB0
P70/RXD
P26/SB1
P71/TXD
P25/SI0
P26/SO0
P27
P72/ASCK
P70/SI2
P71/SO2
P72/SCK2
P00/INTP0
P01/INTP1
P33
P34
P30
P31
P32
P35
P36
—
P97 to P90
P87 to P80
—
—
—
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