PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification
Figure 1. Applications Processor Block Diagram
RTC
OS Timer
PWM(2)
Int Contr.
Clocks &
Pwr Man.
I2S
I2 C
AC97
UART1
UART2
Slow IrDA
Fast IrDA
SSP
USB
Client
MMC
Color or
Grayscale
LCD
Controller
Memory
Controller
DMA
Controller
And
Bridge
Variable
Latency I/O
System Bus Control
PCMCIA & CF
Control
Megacell
Core
3.6864 32.768
MHz KHz
Osc Osc
Dynamic
Memory
Control
Static
Memory
Control
ASIC
Socket 0
XCVR Socket 1
SDRAM/
SMROM
4 banks
ROM/
Flash/
SRAM
4 Banks
3.0
3.1
Package Information
Package Introduction
The applications processor is offered in two packages;
• The PXA250 applications processor, 256-pin mBGA (refer to Figure 2, “PXA250
Applications Processor” on page 16)
• The PXA210 applications processor, 225-pin TPBGA package (refer to Figure 3, “PXA210
Applications Processor” on page 26)
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Datasheet