132 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD
PRELIMINARY SPEC. VER. 0.1
S6B0721
SYSTEM CONTROL
Table 5. System Control Pin Description
Name
I/O
Description
Master / Slave operation select pin
− MS = "H": master operation
− MS = "L": slave operation
The following table depends on the MS status.
MS
I
MS
CLS
OSC
circuit
Power
supply
circuit
CL
M
H
Enabled Enabled Output Output
H
L
Disabled Enabled Input Output
L
-
Disabled Disabled Input
Input
FRS
Output
Output
Output
DISP
Output
Output
Input
CLS
CL
M
FRS
DISP
INTRS
HPM
Built-in oscillator circuit enable / disable select pin
I
− CLS = “H”: enable
− CLS = “L”: disable (external display clock input to CL pin)
Display clock input / output pin
I/O When the S6B0721 is used in master/slave mode (multi-chip), the CL pins must be
connected each other.
LCD AC signal input / output pin
When the S6B0721 is used in master/slave mode (multi-chip), the M pins must be
I/O connected each other.
− MS = “H”: output
− MS = “L”: input
O
Static driver segment output pin
This pin is used together with the M pin.
LCD display blanking control input / output
When S6B0721 is used in master/slave mode (multi-chip), the DISP pins must be
I/O connected each other.
− MS = “H”: output
− MS = “L”: input
Internal resistors select pin
This pin selects the resistors for adjusting V0 voltage level.
I
− INTRS = "H": use the internal resistors.
− INTRS = "L": use the external resistors.
V0 voltage is controlled with VR pin and external resistive divider.
Power control pin of the power supply circuit for LCD driver
I
− HPM = "H": high power mode
− HPM = "L": normal mode
This pin is valid in master operation.
8