ST8016T
7.2.2 Relationship between the display data and LCD drive output Pins
(Segment Mode)
(a) 4-bit Parallel Input Mode
MD
L/R
EIO1
EIO2
DATA
NUMBER OF CLOCKS
INPUT 40 CLOCK 39 CLOCK 38 CLOCK … 3 CLOCK
DI0
L
L
Output Input
Dl1
DI2
DI3
DI0
L
H
Input Output
Dl1
DI2
DI3
Y1
Y2
Y3
Y4
Y160
Y159
Y158
Y157
Y5
Y6
Y7
Y8
Y156
Y155
Y154
Y153
Y9
…
Y10
…
Y11
…
Y12
…
Y152 …
Y151 …
Y150 …
Y149 …
Y149
Y150
Y151
Y152
Y12
Y11
Y10
Y9
2 CLOCK
Y153
Y154
Y155
Y156
Y8
Y7
Y6
Y5
1 CLOCK
Y157
Y158
Y159
Y160
Y4
Y3
Y2
Y1
(b) 8-bit Parallel Input Mode
MD
L/R
EIO1
EIO2
DATA
NUMBER OF CLOCKS
INPUT 20 CLOCK 19 CLOCK 18 CLOCK … 3 CLOCK
DI0
Y1
Dl1
Y2
DI2
Y3
H
L
Output Input
DI3
DI4
Y4
Y5
Y9
Y17
…
Y137
Y10
Y18
…
Y138
Y11
Y19
…
Y139
Y12
Y20
…
Y140
Y13
Y21
Y141
DI5
Y6
Y14
Y22
Y142
DI6
Y7
Y15
Y23
Y143
DI7
DI0
Dl1
DI2
H
H
Input Output
DI3
DI4
Dl5
DI6
DI7
Y8
Y160
Y159
Y158
Y157
Y156
Y155
Y154
Y153
Y16
Y152
Y151
Y150
Y149
Y148
Y147
Y146
Y145
Y24
Y144 …
Y143 …
Y142 …
Y141 …
Y140 …
Y139 …
Y138 …
Y137 …
Y144
Y24
Y23
Y22
Y21
Y20
Y19
Y18
Y17
2 CLOCK
Y145
Y146
Y147
Y148
Y149
Y150
Y151
Y152
Y16
Y15
Y14
Y13
Y12
Y11
Y10
Y9
1 CLOCK
Y153
Y154
Y155
Y156
Y157
Y158
Y159
Y160
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
(Common Mode)
MD
L/R
DATA TRANSFER DIRECTION
L
L
Y160 → Y1
(Single)
H
Y1 → Y160
H
L
(Dual)
H
Y160 → Y81
Y80 → Y1
Y1 → Y80
Y81 → Y160
NOTES:
1. L : LGND (0 V), H : VDD (+2.5 to +5.5 V), X : Don't care
2. "Don't care" should be fixed to "H" or "L", avoiding floating.
EIO1
Output
Input
Output
Input
EIO2
Input
Output
Input
Output
DI7
X
X
Input
Input
Preliminary Ver 0.12
Page 10/27
2007/10/29