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STW5094AD 查看數據表(PDF) - STMicroelectronics

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STW5094AD Datasheet PDF : 52 Pages
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STw5094A
PROGRAMMABLE REGISTERS
Control Register CR0 Functions (Address: 0x00)
7
6
5
4
3
2
1
0
F(1:0) VFS CM MA IA FF B7
Function
0
0
0
1
1
0
1
1
MCLK or AUXCLK = 512 kHz
*
MCLK or AUXCLK = 1.536 MHz
MCLK or AUXCLK = 2.048 MHz
MCLK or AUXCLK = 2.560 MHz
0
Voice Data Fs is 8 kHz
*
1
Voice Data Fs is 16 kHz
0
Linear code
*
1
Companded code
Linear Code
Companded Code
0
0
0
1
1
0
1
1
2-complement
*
sign and magnitude
2-complement
1-complement
µ-law: CCITT D3-D4
*
µ-law: Bare Coding
A-law including even bit inversion
A-law: Bare Coding
0
B1 and B2 consecutive
1
B1 and B2 separated
(1) *
(1)
0 8 bits time-slot
1 7 bits time-slot
(1) *
(1)
(1): significant in companded mode only
*: state at power on initialization
Control Register CR1 Functions (Address: 0x01)
7
6
DM(1:0)
5
4
3
2
1
0
MR MX EN TS DL
Function
0X
1
0
1
1
delayed data timing
*
non-delayed normal data timing
non-delayed reverse data timing
X
0
DR connected to RX path
*
1
CR2A connected to RX path
(1)
0
TX path connected to DX
1
CR3A connected to DX
*
(1)
0
PCM I/F disabled
*
1
PCM I/F enabled
0
B1 channel selected
1
B2 channel selected
*
(1)
0 Normal operation
*
1 Digital Loopback (Data from DR is sent to DX with 1 frame delay)
(1) significant in companded mode only
*: state at power on initialization
X: reserved: write 0
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