PCD3316T/F2 查看數據表（PDF） - Philips Electronics

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PCD3316T/F2

Caller-ID on Call Waiting (CIDCW) receiver

Philips Electronics 

Philips Semiconductors

PCD3316

CIDCW receiver

7.12.6 I2C-bus bit rate

When a microcontroller is used that implements an I2C-bus in software, the bit rate of

the I2C-bus can be critical during reception of FSK. The collection of the interrupt

data and FSK-data from the PCD3316 takes 48 bits on the I2C-bus. With an FSK

U baud rate of 1200 (corresponds to 1200 bits per second) the minimal speed of the

I2C-bus should be 5.76 kbits/s. Additional interrupts generated by the time base of the

n PCD3316 will cause the processor to collect extra information from the PCD3316.

r As a consequence, the FSK-data can be overrun in the PCD3316 and one data byte

e will be lost. In this case, the time base interrupt should be suppressed while FSK is

active. This can be done by setting the ‘INT-SUP on/off’ bit (bit 4 in Mode register 2).

sThe ‘TB on/off’ bit (bit 6 in Mode register 2) will still be set but the IRQ output will not

be activated by the time base interrupt. Any time base interrupt can be detected by

tthe microcontroller when an FSK interrupt is processed by reading the Interrupt

ricted register.

9397 750 04824

Product specification

11 March 1999

© Philips Electronics N.V. 1999. All rights reserved.

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