¡ Semiconductor
MSM82C84A-2RS/GS/JS
AC CHARACTERISTICS
(2)
Parameter
CLK Cycle Time
CLK "H" Pulse Width
CLK "L" Pulse Width
CLK Rising and Falling Edge
Times
PCLK "H" Pulse Width
PCLK "L" Pulse Width
Time from READY Falling Edge
to CLK Falling Edge
Time from READY Rising Edge
to CLK Rising Edge
Delay from CLK Falling Edge
to RESET Falling Edge
Delay from CLK Falling Edge
to PCLK Rising Edge
Delay from CLK Falling Edge
to PCLK Falling Edge
Delay from OSC Falling Edge
to CLK Rising Edge
Delay from OSC Falling Edge
to CLK Falling Edge
Symbol
tCLCL
tCHCL
Conditions
—
—
tCLCH
—
tCH1CH2
tCL2CL1
tPHPL
tPLPH
tRYLCL
1.0 V to 3.5 V
—
—
—
(VCC = 5 V ± 10%, Ta = -40 to 85°C)
Min.
Max. Unit
125
— ns
1
3 TCLCL + 2
—
ns
2
3 TCLCL –15
—
ns
—
10 ns
TCLCL –20
TCLCL –20
-8
— ns
—
— ns
tRYHCH
—
Output Load
Capacitance
2
3 TCLCL –15 —
ns
tCLIL
tCLPH
—
CLK Output
—
CL = 100 pF
—
Others 30 pF
—
40 ns
22 ns
tCLPL
—
—
22 ns
tOLCH
—
tOLCL
—
–5
22 ns
2
35 ns
Output Rising Edge Time
(Except CLK)
Output Falling Edge Time
(Except CLK)
tOLOH 0.8 V to 2.2 V
tOHOL 2.2 V to 0.8 V
—
15 ns
—
15 ns
Note: Parameters where timing has not been indicated in the above table are measured at
VL = 1.5 V and VH = 1.5 V for both inputs and outputs.
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