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AD871JD

Complete 12-Bit 5 MSPS Monolithic A/D Converter

Analog Devices 

AD871

+5D

ANALOG IN

J1

TP1

R1

49.9⍀

C7

10␮F

JP1

U2

REF43

+5A 1

8

2

7

3

4

VIN

VOUT

GND

6

5

+5A

4

AVDD

C12

0.1␮F

7

DVDD

6

DGND

5 AGND

22

DRVDD

C20

10pF

C18

0.1␮F

JP2

C21

1␮F

1 VINA

23

DGND

AD871

21

2

CLK

OTR

20

VINB

27

REF GND

28

REF IN

26

REF OUT

JP

* 11

MSB

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 8

BIT 9

19

18

17

16

15

14

13

12

11

10

BIT 10 9

BIT 11 8

BIT 12

24

AGND

AVSS

AVSS

R3

10⍀

CLOCK INPUT

J2

C13

0.1␮F

C14

0.1␮F

R2

49.9⍀

+5D

U3

74HC04

C15

C16

0.1␮F 0.1␮F

1

25

JP6

JP5

C22

0.1␮F

*NOTE: JP11 SHOULD BE OPEN

3

C11

0.1␮F

25

C17

0.1␮F

–5A

TP2

JP8

JP7

3

4

JP9

6

JP10

+5VA

AGND

–5VA

+5VD

DGND

FB1

C2

0.01␮F

C1

0.01␮F

FB2

FB3

C3

0.01␮F

TP5 +5A

C5

22␮F

C9

0.1␮F

C4

22␮F

C8

0.1␮F

–5A

C6

22␮F

TP6

TP3 +5D

C10

0.1␮F

TP4

TP7

Figure 34. AD872/AD871 Evaluation Board Schematic

JP3

P1

JP4

40-PIN

R4 IDC CONN.

R5 20⍀ 1

R6 20⍀

R7 20⍀

R8 20⍀

R9 20⍀

R10 20⍀

R11 20⍀

R12 20⍀

R13 20⍀

R14 20⍀

R15 20⍀

R16 20⍀

R17 20⍀

40

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

28-Lead Side Brazed Ceramic DIP (D-28)

44-Terminal LCC (E-44A)

0.005 (0.13) MIN

28

PIN 1

1

0.225

(5.72)

MAX

0.200 (5.08)

0.125 (3.18)

0.026 (0.66)

0.014 (0.36)

0.100 (2.54) MAX

15

0.610 (15.49)

0.500 (12.70)

1.490 (37.85) MAX

14

0.060 (1.52)

0.015 (0.38)

0.620 (15.75)

0.590 (14.99)

0.110 (2.79)

0.090 (2.29)

0.150

(3.81)

MIN

0.070 (1.78)

0.030 (0.76)

SEATING

PLANE

0.018 (0.46)

0.008 (0.20)

0.100 (2.54) 0.055 (1.40)

0.064 (1.63) 0.045 (1.14)

6

0.050

(1.27)

BSC

0.075 (1.91) REF

0.020 (0.51)

REF x 45°

40

1

TOP VIEW

0.028 (0.71)

0.022 (0.56)

28

18

0.662 (16.82)

0.640 (16.27) SQ

0.040 (1.02)

REF x 45°

3 PLACES

–16–

REV. A

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