UJA1066TW 查看數據表（PDF） - NXP Semiconductors.

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UJA1066TW

High-speed CAN fail-safe system basis chip

NXP Semiconductors. 

UJA1066

High-speed CAN fail-safe system basis chip

Rev. 03 — 17 March 2010

Product data sheet

1. General description

The UJA1066 fail-safe System Basis Chip (SBC) replaces basic discrete components

which are common in every Electronic Control Unit (ECU) with a Controller Area Network

(CAN) interface. The fail-safe SBC supports all networking applications that control

various power and sensor peripherals by using high-speed CAN as the main network

interface. The fail-safe SBC contains the following integrated devices:

• High-speed CAN transceiver, interoperable and downward compatible with CAN

transceiver TJA1041 and TJA1041A, and compatible with the ISO 11898-2 standard

and the ISO 11898-5 standard (in preparation)

• Advanced independent watchdog

• Dedicated voltage regulators for microcontroller and CAN transceiver

• Serial peripheral interface (full duplex)

• Local wake-up input port

• Inhibit/limp-home output port

In addition to the advantages of integrating these common ECU functions in a single

package, the fail-safe SBC offers an intelligent combination of system-specific functions

such as:

• Advanced low-power concept

• Safe and controlled system start-up behavior

• Advanced fail-safe system behavior that prevents any conceivable deadlock

• Detailed status reporting on system and subsystem levels

The UJA1066 is designed to be used in combination with a microcontroller that

incorporates a CAN controller. The fail-safe SBC ensures that the microcontroller is

always started up in a defined manner. In failure situations, the fail-safe SBC will maintain

microcontroller functionality for as long as possible to provide a full monitoring and

software-driven fallback operation.

The UJA1066 is designed for 14 V single power supply architectures and for 14 V and

42 V dual power supply architectures.

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