µPD754202, 754202(A)
Figure 5-1. Program Memory Map
Address 7 6
54 3
0
0000H MBE RBE 0 0
0 Internal reset start address (high-order 3 bits)
0001H
Internal reset start address (low-order 8 bits)
0002H MBE RBE 0 0
0003H
0 INTBT start address
INTBT start address
(high-order 3 bits)
CALLF !faddr instruction
(low-order 8 bits)
entry address
0004H MBE RBE 0 0
0 INT0 start address
(high-order 3 bits)
0005H
INT0 start address
(low-order 8 bits)
0006H
0007H
0008H
0009H
000AH MBE RBE 0 0
000BH
000CH MBE RBE 0 0
0 INTT0 start address
(high-order 3 bits)
INTT0 start address
(low-order 8 bits)
0 INTT1/INTT2 start address (high-order 3 bits)
Branch address of
BR !addr
BRCB !caddr
BR BCDE
BR BCXA
BRA !addr1Note
CALL !addr
CALLA !addr1Note
instructions
000DH
INTT1/INTT2 start address (low-order 8 bits)
GETI branch/call
address
0020H
007FH
0080H
GETI instruction reference table
BR $addr instruction
relative branch address
(–15 to –1, +2 to +16)
07FFH
Note Can be used in Mk II mode only.
Remark In addition to the above, a branch can be made to an address with only the low-order 8 bits of the PC
changed by means of a BR PCDE or BR PCXA instruction.
15