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EP2AGZ225CH29I5ES

Arria II Device Handbook

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Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices

Dedicated Remote System Upgrade Circuitry

9–55

Dedicated Remote System Upgrade Circuitry

This section describes the implementation of the Arria II remote system upgrade

dedicated circuitry.

The remote system upgrade circuitry is implemented in hard logic. This dedicated

circuitry interfaces with the user-defined factory and application configurations

implemented in the Arria II device logic array to provide the complete remote

configuration solution. The remote system upgrade circuitry contains the remote

system upgrade registers, a watchdog timer, and a state machine that controls those

components.

Figure 9–25 shows the datapath of the remote system upgrade block.

Figure 9–25. Remote System Upgrade Circuit Data Path (Note 1)

Internal Oscillator

Status Register (SR)

[4..0]

Control Register

[37..0]

Logic Array

Update Register

[37..0] update

Shift Register

dout Bit [4..0]

din dout

capture

Bit [37..0]

din

capture

RSU

State

time-out

User

Watchdog

Machine

Timer

clkout capture update

Logic Array

clkin

RU_DOUT

RU_SHIFTnLD RU_CAPTnUPDT

RU_CLK RU_DIN RU_nCONFIG RU_nRSTIMER

Logic Array

Note to Figure 9–25:

(1) The RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN, RU_nCONFIG, and RU_nRSTIMER signals are internally controlled by the

ALTREMOTE_UPDATE megafunction.

July 2012 Altera Corporation

Arria II Device Handbook Volume 1: Device Interfaces and Integration

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