ADP3410KRU 查看數據表（PDF） - Analog Devices

零件编号

产品描述 (功能)

生产厂家

ADP3410KRU

Dual MOSFET Driver with Bootstrapping

Analog Devices 

a

FEATURES

All-In-One Synchronous Buck Driver

One PWM Signal Generates Both Drives

Anticross-Conduction Protection Circuitry

Programmable Transition Delay

Synchronous Override Control

Undervoltage Lockout

Programmable Overvoltage Shutdown

VCC Good Signal Drives Auxiliary Circuits

Shutdown Quiescent Current < 10 ␮A

APPLICATIONS

Mobile Computing CPU Core Power Converters

Multiphase Desktop CPU Supplies

Single-Supply Synchronous Buck Converters

Standard-to-Synchronous Converter Adaptations

Dual MOSFET Driver

with Bootstrapping

ADP3410

FUNCTIONAL BLOCK DIAGRAM

VCC

VCCGD

GND

ADP3410

4.4V

SD

IN

CONTROL

AND

DLY

OVERLAP

VCC PROTECTION

CIRCUIT

VCC

OVPSET

1.2V

BST

DRVH

SW

DRVL

DRVLSD

PGND

SRMON

GENERAL DESCRIPTION

5V

VBATT

The ADP3410 is a dual MOSFET driver optimized for driving

two N-channel FETs that are the two switches in the non-

isolated synchronous buck power converter topology. Each of

the drivers is capable of driving a 3000 pF load with a 20 ns

propagation delay and a 30 ns transition time. One of the drivers

can be bootstrapped, and is designed to handle the high-voltage

VCC

SD

VCCGD

slew rate associated with “floating” high-side gate drivers. The

ADP3410 has several protection features: overlapping drive

TO PWM

CONTROLLER

ADP3410

IN

BST

prevention (ODP), undervoltage lockout (UVLO) with perform-

ance specified at very low VCC levels, and overvoltage protection

DRVLSD DRVH

VOUT

(OVP) that can be used to monitor either the input or output.

SRMON

SW

Additional features include: programmable transition delay, a

synchronous drive override control pin, a synchronous drive

OVPSET DRVL

status monitor and, in conjunction with exiting from the UVLO

DLY

mode, a VCC Good (VCCGD) signal capable of driving a 10 mA

load. The quiescent current, when the device is disabled, is less

GND PGND

than 10 mA.

Figure 1. Typical Application Circuit

REV. A

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

that may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 2002

Share Link: