73K224BL 查看數據表（PDF） - Unspecified
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73K224BL Datasheet PDF : 33 Pages
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73K224BL
V.22bis/V.22/V.21/Bell 212A/103
Single-Chip Modem w/ Integrated Hybrid
CONTROL REGISTER 1 (continued)
CR1
ADDR
001
BIT
D4
D7
D6
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
NAME
Bypass
Scrambler
D5
ENABLE
DETECT
INTERRUPT
CONDITION
0
1
D5
Enable Detect
0
Interrupt
1
D6, D7
Transmit
Pattern
D7 D6
00
01
10
11
D4
BYPASS
SCRAMBLER
D3
CLOCK
CONTROL
D2
RESET
D1
TEST
MODE 1
D0
TEST
MODE 0
DESCRIPTION
Selects normal operation. DPSK and QAM data is
passed through scrambler.
Selects Scrambler bypass. Bypass DPSK and QAM
data is route around scrambler in the transmit path.
Disables interrupt at INT pin. All interrupts are normally
disabled in power-down mode.
Enables INT output. An interrupt will be generated with a
change in status of DR bits D1- D4 and D6. The answer
tone and call progress detect interrupts are masked
when the TX enable bit is set. Carrier detect is masked
when TXDTMF is activated. All interrupts will be
disabled if the device is in power-down mode.
Selects normal data transmission as controlled by the
state of the TXDpin.
Selects an alternating mar/space transmit pattern for
modem testing and handshaking. Also used for S1
pattern generation (see CR2 bit D4).
Selects a constant mark transmit pattern.
Selects a constant space transmit pattern.
DETECT REGISTER
DR
ADDR
010
BIT
D0
D1
D7
D6
D5
D4
D3
D2
D1
D0
RECEIVE
LEVEL
INDICATOR
S1
PATTERN
DETECT
RECEIVE
DATA
UNSCR.
MARK
DETECT
CARR.
DETECT
ANSWER
TONES
DETECT
CALL
PROG.
DETECT
SIGNAL
QUALITY
INDICATOR
NAME
CONDITION DESCRIPTION
Signal Quality
0
Indicates normal received signal.
Indicator
1
Indicates low received signal quality (above average
error rate). Interacts with Special Register bits D2, D1.
Call Progress
0
No call progress tone detected.
Detect
1
Indicates presence of call progress tones. The call
progress detection circuitry is activated by energy in the
normal 350 to 620 Hz call progress bandwidth.
12
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