AD1981B 查看數據表（PDF） - Analog Devices
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AD1981B Datasheet PDF : 28 Pages
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AD1981B
Codec ID
00
00
00
01
01
10
10
11
Function
AC ’97 2.2 AMAP Compliant Default SPDIF Slot Assignments
SPSA = 00 SPSA = 01
SPSA = 10
2-Ch Primary w/SPDIF
4-Ch Primary w/SPDIF
6-Ch Primary w/SPDIF
+2-Ch Secondary w/SPDIF
+4-Ch Secondary w/SPDIF
+2-Ch Secondary w/SPDIF
+4-Ch Secondary w/SPDIF
+2-Ch Secondary w/SPDIF
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
7 and 8 (default)
7 and 8
7 and 8
7 and 8
7 and 8
7 and 8
7 and 8
7 and 8
6 and 9
6 and 9 (default)
6 and 9
6 and 9 (default)
6 and 9
6 and 9 (default)
6 and 9
6 and 9
SPSA = 11
10 and 11
10 and 11
10 and 11 (default)
10 and 11 (default)
10 and 11 (default)
10 and 11 (default)
PCM Front DAC Rate Register (Index 2Ch)
Reg
No. Name
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
2Ch PCM Front SRF15 SRF14 SRF13 SRF12 SRF11 SRF10 SRF9 SRF8 SRF7 SRF6 SRF5 SRF4 SRF3 SRF2 SRF1 SRF0 BB80h
DAC Rate
This read/write sample rate control register contains a 16-bit unsigned value, representing the rate of operation in Hz.
SR[15:0]
Sample Rate. The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.
If 0 is written to VRA, the sample rate is reset to 48k.
PCM ADC Rate Register (Index 32h)
Reg
No. Name
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
32h PCM L/R SRA15 SRA14 SRA13 SRA12 SRA11 SRA10 SRA9 SRA8 SRA7 SRA6 SRA5 SRA4 SRA3 SRA2 SRA1 SRA0 BB80h
ADC Rate
This read/write sample rate control register contains 16-bit unsigned value, representing the rate of operation in Hz.
SR[15:0]
Sample Rate. The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.
If 0 is written to VRA, the sample rate is reset to 48k.
REV. B
–19–
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