HEF4050B(2016) 查看數據表（PDF） - NXP Semiconductors.

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HEF4050B
(Rev.:2016)

Hex non-inverting buffers

NXP Semiconductors. 

Nexperia

HEF4050B

Hex non-inverting buffers

9''

9,

*

92

'87

57

&/

DDJ

Fig 6.

Test data is given in Table 10.

Definitions for test circuit:

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

Test circuit for measuring switching times

Table 10. Test data

Supply voltage

VDD

5 V to 15 V

Input

VI

VDD

VM

0.5VI

tr, tf

 20 ns

Load

CL

50 pF

HEF4050B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 10 — 23 June 2016

© Nexperia B.V. 2017. All rights reserved

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