HEF4081BPB 查看數據表（PDF） - Philips Electronics
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HEF4081BPB Datasheet PDF : 3 Pages
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Philips Semiconductors
Quadruple 2-input AND gate
Product specification
HEF4081B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL TYP. MAX.
Propagation delays
In → On
HIGH to LOW
LOW to HIGH
Output transition times
HIGH to LOW
LOW to HIGH
5
10
tPHL
15
5
10
tPLH
15
5
10
tTHL
15
5
10
tTLH
15
55
110 ns
25
50 ns
20
40 ns
45
90 ns
20
40 ns
15
30 ns
60
120 ns
30
60 ns
20
40 ns
60
120 ns
30
60 ns
20
40 ns
TYPICAL EXTRAPOLATION
FORMULA
28 ns + (0,55 ns/pF) CL
14 ns + (0,23 ns/pF) CL
12 ns + (0,16 ns/pF) CL
18 ns + (0,55 ns/pF) CL
9 ns + (0,23 ns/pF) CL
7 ns + (0,16 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P (µW)
5
450 fi + ∑ (foCL) × VDD 2
where
10
2 900 fi + ∑ (foCL) × VDD 2
fi = input freq. (MHz)
15
11 700 fi + ∑ (foCL) × VDD 2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
January 1995
3
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