www.vishay.com
VDS
Vary tp to obtain
required IAS
Rg
- 10 V
tp
L
D.U.T
IAS
0.01 Ω
-
+
V
DD
Fig. 12a - Unclamped Inductive Test Circuit
IRFL9014, SiHFL9014
Vishay Siliconix
IAS
VDS
VDD
tp
VDS
Fig. 12b - Unclamped Inductive Waveforms
400
ID
Top - 0.80 A
- 1.1 A
300
Bottom - 1.8 A
200
100
VDD = - 25 V
0
25
50
75
100
125
150
91195_12c
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
- 10 V
QGS
VG
QG
QGD
Charge
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 kΩ
0.2 µF
0.3 µF
-
D.U.T. + VDS
VGS
- 3 mA
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
S14-1686-Rev. F, 18-Aug-14
5
Document Number: 91195
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000