MC74VHC125DTR2 查看數據表（PDF） - ON Semiconductor
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MC74VHC125DTR2 Datasheet PDF : 9 Pages
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MC74VHC125
Quad Bus Buffer
with 3−State Control Inputs
The MC74VHC125 is a high speed CMOS quad bus buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74VHC125 requires the 3−state control input (OE) to be set
High to place the output into the high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
• High Speed: tPD = 3.8ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2 V to 5.5 V Operating Range
• Low Noise: VOLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: Human Body Model; > 2000 V,
Machine Model; > 200 V
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
14−LEAD SOIC
D SUFFIX
CASE 751A
14−LEAD TSSOP
DT SUFFIX
CASE 948G
14−LEAD SOIC EIAJ
M SUFFIX
CASE 965
PIN CONNECTION AND
MARKING DIAGRAM
(Top View)
OE1 1
A1 2
Y1 3
OE2 4
A2 5
Y2 6
GND 7
14 VCC
13 OE4
12 A4
11 Y4
10 OE3
9 A3
8 Y3
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
ORDERING INFORMATION
Device
Package Shipping
MC74VHC125DG
SOIC
55 Units/Rail
MC74VHC125DTR2G TSSOP 2500 Units/Reel
MC74VHC125MG SOIC EIAJ 50 Units/Rail
MC74VHC125DR2G SOIC 2500 Units/Reel
MC74VHC125MELG SOEIAJ 2000 Units/Reel
© Semiconductor Components Industries, LLC, 2011
1
May, 2011 − Rev. 6
Publication Order Number:
MC74VHC125/D
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