ST8004 查看數據表（PDF） - STMicroelectronics
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ST8004 Datasheet PDF : 26 Pages
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ST8004
Electrical characteristics
Table 14.
Symbol
Logic inputs (pins CLKDIV1, CLKDIV2, PRES, PRES, CMDVCC, RSTIN and 5V/3V,
VTHSEL (VDD = 3.3V, VDDP = 5V, fXTAL = 10MHz, unless otherwise noted. Typical values
are to Ta = 25°C) (Note 3)
Parameter
Test Conditions
Min. Typ. Max. Unit
VIL
VIH
|ILIH|
|ILIL|
Low Level Input Voltage
High Level Input Voltage
Input Leakage Current
when high
Input Leakage Current
when low
VIL = 0 to VDD
VIH = 0 to VDD
0
0.7 VDD
0.3 VDD
V
VDD
V
5
µA
5
µA
Table 15.
Symbol
OFF outputs (pin OFF is an open drain with an internal 20 kΩ Pull-up resistor to VDD);
(see note 5) (VDD = 3.3V, VDDP = 5V, fXTAL = 10MHz, unless otherwise noted. Typical values
are to TA = 25°C)
Parameter
Test Conditions
Min. Typ. Max. Unit
VOL Low Level Output Voltage IOL = 2 mA
VOH High Level Output Voltage IOH = -15 µA
0.75 VDD
0.4
V
V
Table 16.
Symbol
Protection (VDD = 3.3V, VDDP = 5V, fXTAL = 10MHz, unless otherwise noted. Typical values
are to TA = 25°C)
Parameter
Test Conditions
Min. Typ. Max. Unit
TSD Shut down temperature
ICC(SD) Shut down current at VCC
135
°C
150
mA
Table 17.
Symbol
Timing (VDD = 3.3V, VDDP = 5V, fXTAL = 10MHz, unless otherwise noted. Typical values are
to TA = 25°C)
Parameter
Test Conditions
Min. Typ. Max. Unit
tACT Activation sequence duration (See Figure 5.)
tDE Deactivation sequence duration (See Figure 6.)
t3
Start of the windows to send
CLK to card
(See Figure 5.)
t5
End of the windows to send
CLK to card
(See Figure 5.)
180
220
µs
60
80
100
µs
130
µs
140
µs
Note: 1 To meet these specifications VCC should be decoupled to CGND using two ceramic
multiplier capacitors of low ESR with values of 100nF.
2 The transition time and duty cycle factor are shown in Figure 9.; d = t1/(t1+t2).
3 PRES and CMDVCC are active Low; RSTIN and PRES are active High
4 Referred to the paragraph "CLOCK CIRCUITRY"
5 See paragraph "FAULT DETECTION".
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