WM8716EDS 查看數據表（PDF） - Wolfson Microelectronics plc

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WM8716EDS

High Performance 24-bit, 192kHz Stereo DAC

Wolfson Microelectronics plc 

WM8716

Production Data

DAC OUTPUT ATTENUATION

The level of attenuation for eight bit code X, is given by:

0.5 ∗ (X - 255) dB, 1 ≤ X ≤ 255

- ∞dB (mute),

X=0

Bit 8 in register 0 (LDL) is used to control the loading of attenuation data in B[7:0]. When LDL is set

to 0, attenuation data will be loaded into AL[7:0], but it will not affect the filter attenuation. LDR in

register 1 has the same function for right channel attenuation. Only when LDL or LDR is set to ’1’ will

the filter attenuation be updated. This permits left and right channel attenuation to be updated

simultaneously.

Attenuation level is controlled by AL[7:0] (left channel) or AR[7:0] (right channel). Attenuation levels

are given in Table 4.

X[7:0]

ATTENUATION LEVEL

00(hex)

- ∞dB (mute)

01(hex)

-127.0dB

:

:

:

:

FD(hex)

-1.0dB

FE(hex)

-0.5dB

FF(hex)

0.0dB

Table 7 Attenuation Control Level

Bit 2 in Reg3 is used to control the attenuator (ATC). When ATC is “high”, the attenuation data

loaded in program register 0 is used for both the left and the right channels. When ATC is low, the

attenuation data for each register is applied separately to left and right channels.

SOFT MUTE

MUT

(REG2, B0)

L

Soft Mute off (normal operation)

H

Soft Mute on (no output)

Table 8 Soft Mute

Setting MUT causes the attenuation to ramp from the current value down to 00. The values held in

the attenuation registers are unchanged. When MUT is reset the attenuation will ramp back up to the

previous value. The ramp rate is 128/fs s/0.5dB step.

DIGITAL DE-EMPHASIS

DEM

(REG2, B1)

L

De-emphasis off

H

De-emphasis on

Table 9 Digital De-Emphasis

DAC OPERATION ENABLE

OPE

(REG2,B2)

L

H

Normal operation

DAC output forced to bipolar zero,

irrespective of input data.

Table 10 DAC Operation Enable

WOLFSON MICROELECTRONICS LTD

PD Rev 3.1 April 2001

12

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