SL74LV138D 查看數據表（PDF） - System Logic Semiconductor
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SL74LV138D Datasheet PDF : 5 Pages
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SL74LV138
3-TO-8 DECODER/DEMULTIPLEXER
By pinning SL74LV138 are compatible with SL74HC138 and
SL74HCT138 series. Input voltage levels are compatible with
standard CMOS ones.
• Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL ICS
• Supply voltage range is from 1.2 to 5.5 V
• Low input current: 1.0 µÀ; 0.1 µÀ at Ò = 25 °Ñ
• Output current 6 mÀ
• Latch current is not less than 150 mÀ at Ò = 125 °Ñ
• ESD acceptable values: than 2000 V as per HBM, and not less
than 200 V as per MM
BLOCK DIAGRAM
Y0
Y1
ORDERING INFORMATION
SL74LV138N Plastic DIP
SL74LV138D SOIC
TA = -40° to 125° C
for all packages
PIN ASSIGNMENT
Y2
A0 1
16 VCC
A1 2
15 Q0
Y3
A2 3
14 Q1
A0
CS2 4
13 Q2
A1
Y4
Cs3 5
12 Q3
CS1 6
11 Q4
Y5
A2
Y7 7
10 Q5
Y6
GND 8
9 Q6
CS3
Y7
CS2
CS1
FUNCTION TABLE
INPUTS
OUTPUTS
CS1 CS2 CS3 A2 A1 A0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
X XH X XXH HHH HHH H
XH XX XXH HHH HHH H
L XXX XXH HHH HHH H
H L L L L L L HHHHHHH
H L L L LHH LHHHHHH
H L L L HLHHLHHHHH
H L L L HHHHHL HHHH
H L LH L LHHHH LHHH
H L LH LHHHHHHLHH
H L LHHLHHHHHHL H
H L LHHHHHHHHHH L
SLS System Logic
Semiconductor
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