NL27WZ126
Dual Buffer with 3−State
Outputs
The NL27WZ126 is a high performance dual noninverting buffer
operating from a 1.65 V to 5.5 V supply.
Features
• Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5.0 V
• Designed for 1.65 V to 5.5 V VCC Operation
• Over Voltage Tolerant Inputs and Outputs
• LVTTL Compatible − Interface Capability With 5.0 V TTL Logic
with VCC = 3.0 V
• LVCMOS Compatible
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current Substantially Reduces System
Power Requirements
• 3−State OE Input is Active−High
• Replacement for NC7WZ126
• Chip Complexity = 72 FETs
• Pb−Free Package is Available
http://onsemi.com
MARKING
DIAGRAM
8
8
1
US8
US SUFFIX
CASE 493
M2 M G
G
1
M2 = Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon
manufacturing location.
OE1 1
A1 2
8 VCC
7 OE2
Y2 3
6 Y1
GND 4
5 A2
Figure 1. Pinout (Top View)
A1
1
OE1
EN
Y1
A2
Y2
OE2
Figure 2. Logic Symbol
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 6
PIN ASSIGNMENT
Pin
Function
1
OE
2
A1
3
Y2
4
GND
5
A2
6
Y1
7
OE2
8
VCC
FUNCTION TABLE
Input
OEn
An
H
H
Output
Yn
H
H
L
L
L
X
Z
X = Don’t Care
n = 1, 2
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
1
Publication Order Number:
NL27WZ126/D