EMC1403 查看數據表（PDF） - Microchip Technology

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EMC1403

1°C Temperature Sensor with Beta Compensation

Microchip Technology 

1°C Temperature Sensor with Beta Compensation

Data Sheet

Table 6.19 Substrate Diode Ideality Factor Look-Up Table (BJT Model) (continued)

SETTING

11h

12h

13h

14h

15h

16h

17h

FACTOR

0.9986

1.0000

1.0013

1.0026

1.0039

1.0053

1.0066

SETTING

21h

22h

23h

24h

25h

26h

27h

FACTOR

1.0200

1.0213

1.0226

1.0239

1.0252

1.0265

1.0278

SETTING

31h

32h

33h

34h

35h

36h

37h

FACTOR

1.0408

1.0421

1.0434

1.0447

1.0460

1.0473

1.0486

APPLICATION NOTE: When measuring a 65nm Intel CPUs, the Ideality Setting should be the default 12h. When

measuring 45nm Intel CPUs, the Ideality Setting should be 15h.

6.15 High Limit Status Register

Table 6.20 High Limit Status Register

ADDR. R/W REGISTER B7

B6

B5

B4

B3

B2

B1

B0 DEFAULT

35h

R-C

High Limit

Status

-

-

-

- E3HIGH E2HIGH E1HIGH IHIGH

00h

6.16

The High Limit Status Register contains the status bits that are set when a temperature channel high

limit is exceeded. If any of these bits are set, then the HIGH status bit in the Status Register is set.

Reading from the High Limit Status Register will clear all bits if. Reading from the register will also

clear the HIGH status bit in the Status Register.

The ALERT pin will be set if the programmed number of consecutive alert counts have been met and

any of these status bits are set.

The status bits will remain set until read unless the ALERT pin is configured as a comparator output

(see Section 5.3.2).

Bit 3 - E3HIGH - This bit is set when the External Diode 3 channel exceeds its programmed high limit.

Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel exceeds its programmed high limit.

Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel exceeds its programmed high limit.

Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.

Low Limit Status Register

ADDR.

R/W

36h

R-C

REGISTER

Low Limit

Status

Table 6.21 Low Limit Status Register

B7 B6 B5 B4

B3

B2

B1

B0

DEFAULT

-

-

-

- E3LOW E2LOW E1LOW ILOW

00h

The Low Limit Status Register contains the status bits that are set when a temperature channel drops

below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.

 2014 Microchip Technology Inc.

DS20005272A-page 41

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