D3N50 查看數據表（PDF） - Alpha and Omega Semiconductor
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D3N50 Datasheet PDF : 6 Pages
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AOD3N50/AOU3N50
+
VDC
-
Vgs
Ig
Gate Charge Test Circuit & Waveform
+
VDC Vds
DUT -
Vgs
Qg
10V
Qgs Qgd
Vds
Vgs
Rg
Vgs
Res istive Switching Test Circuit & Waveforms
RL
Vds
+
DUT
VDC Vdd
-
Vgs
t d(on) t r
t on
t d(off)
tf
t off
Charge
90%
10%
Vds
Id
Vgs
Rg
Vgs
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LI AR
Vds
Vgs
+
VDC Vdd
-
Id
DUT
Vgs
BVDSS
IAR
Vds +
Diode RecoveryTes t Circuit & Waveforms
Qrr = - Idt
DUT
Vgs
Vds -
Isd
L
Isd
IF
dI/dt
trr
Vgs
Ig
+
VDC Vdd
-
Vds
IRM
Vdd
Rev 6: Aug 2011
www.aosmd.com
Page 6 of 6
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