74ABT20 查看數據表（PDF） - NXP Semiconductors.

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74ABT20

Dual 4-input NAND gate

NXP Semiconductors. 

Nexperia

4. Functional diagram

74ABT20

Dual 4-input NAND gate

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Fig 1. Logic symbol

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Fig 2. IEC Logic symbol



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Fig 3. Logic diagram (one gate)

5. Pinning information

5.1 Pinning

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Fig 4. Pin configuration for SO14

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Fig 5. Pin configuration for SSOP14 and TSSOP14

74ABT20

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 12 August 2016

© Nexperia B.V. 2017. All rights reserved

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