24C256(2009) 查看數據表（PDF） - ON Semiconductor

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24C256
(Rev.:2009)

256 kb I2C CMOS Serial EEPROM

ON Semiconductor 

CAT24C256

S

T

BUS ACTIVITY: A

MASTER

R

T

SLAVE

ADDRESS

BYTE ADDRESS

A15 − A8

A7 − A0

S

T

DATA

O

P

SDA LINE S

*

P

A

A

A

A

C

C

C

C

K

K

K

K

* = Don’t Care Bit

Figure 6. Byte Write Timing

SCL

SDA

8th Bit

Byte n

ACK

tWR

STOP

CONDITION

Figure 7. Write Cycle Timing

START

CONDITION

ADDRESS

BUS

S

T

ACTIVITY: A

MASTER R

T

SLAVE

ADDRESS

BYTE ADDRESS

A15 − A8

A7 − A0

DATA

DATA n

S

T

DATA n+63

O

P

SDA LINE S

*

P

A

A

A

A

AA

A

C

C

C

C

CC

C

* = Don’t Care Bit

K

K

K

K

KK

K

Figure 8. Page Write Timing

ADDRESS

BYTE

DATA

BYTE

1

8

9

1

8

SCL

SDA

a7

a0

d7

d0

tSU:WP

WP

tHD:WP

Figure 9. WP Timing

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