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FOD8333 查看數據表(PDF) - Fairchild Semiconductor

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FOD8333 Datasheet PDF : 34 Pages
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Normal
Operation
IF
VDESAT
VO
Fault Condition
Blanking
Time
6.5V
Automatic
Reset
FAULT
Figure 56. Operating Relationsip Among Desaturation Voltage (DESAT), Fault Output (FAULT),
and Reset Conditions
1. LED Input and Operation Explanation
FOD8333 is an advanced IGBT gate-drive optocoupler
capable of driving most 1200 V / 150 A IGBTs and power
MOSFETs in motor control and inverter applications.
The following section describes driving IGBT, but is also
applicable to driving MOSFET. Adjust the VDD supply
based on the gate threshold voltages. Critical protection
features and controls are incorporated to simplify the
design and improve reliability. The device includes an
IGBT desaturation detection protection and a FAULT
status output.
This highly integrated device consists of two high-
performances AlGaAs LEDs and two integrated circuits.
LED1 directly controls the isolated gate driver IC output,
while the returned optical signal path is transmitted by
LED2, which reports the fault status through the open-
collector fault-sense IC output.
The control LED input and the fault-sense IC output
can be connected to a standard 3.3 V / 5 V DSP or
microcontroller. The gate driver output can be connected
to the gate of the power devices on the high-voltage side.
A typical recommended application is shown in
Figure 54. A typical shunt LED drive can be used to
improve noise immunity. The LED is connected in
parallel with the bipolar transistor switch, creating a
current shunt drive. Common-mode transients from the
load coupling via the package capacitance can be
coupled into a low-impedance path, either the
conducting LED or the on resistance of the conducting
bipolar transistor, increasing its noise immunity.
During normal operation, when no fault is detected,
LED1 controls the gate driver output. VO is set to HIGH
when the current flowing from the anode to the cathode
(LED1) is greater than IFLH and the forward voltage VF is
greater than VF(MIN). The timing relationship between
the LED input and gate driver output is illustrated in
Figure 3. When a fault is detected, the gate driver ouptut
IC immediately enters “soft” turn-off mode, where the
output voltage changes slowly from HIGH to LOW state.
This also disables the gate control input on the gate
driver IC side for a minimum mute time, tDESAT(MUTE), of
20 µs.
The FAULT output, which is open-collector configura-
tion, is latched to LOW state to report a fault status to the
microcontroller. It is only reset or pulled back to HIGH
automatically after the fixed mute time, tDESAT(MUTE).
The active Miller clamp function avoids the need of
negative gate driving in most applications and allows the
use of a simple bootstrap supply for the high-side driver.
2. Gate Driver Output
A pair of PMOS and NMOS make up the output driver
stage, which facilitates close to rail-to-rail output swing.
This feature allows tight control of gate voltage during
on-state and short-circuit conditions.
The output driver can typically sink 2.5 A and source
2.5 A at room temperature. Due to the low RDS(ON) of the
MOSFETs, the power dissipation is lower than bipolar-
type driver output stages. The absolute maximum rating
of the output peak current, IO(PEAK), is 3 A. Careful
selection of the gate resistor, RG, is required to avoid
violation of this rating. For charging and discharging, the
RG value is approximated by:
RG = VCC – VEE – VOL / IOL(PEAK)
(1)
©2014 Fairchild Semiconductor Corporation
FOD8333 Rev. 1.0.3
26
www.fairchildsemi.com

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