ADP7118 查看數據表（PDF） - Analog Devices

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ADP7118

20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator

Analog Devices 

Data Sheet

0

–20

–40

–60

–80

–100

–120

3.0V

2.0V

1.6V

1.4V

1.2V

1.0V

800mV

700mV

600mV

500mV

10

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 30. Power Supply Rejection Ratio (PSRR) vs. Frequency, VOUT = 5 V,

for Various Headroom Voltages

0

10Hz

–10

100Hz

1kHz

–20

10kHz

100kHz

1MHz

–30

10MHz

–40

–50

–60

–70

–80

–90

–100

0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0

HEADROOM VOLTAGE (V)

Figure 31. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage,

VOUT = 5 V, for Different Frequencies

20

10Hz TO 100kHz

100Hz TO 100kHz

16

12

8

4

0

1

10

100

1000

LOAD CURRENT (mA)

Figure 32. RMS Output Noise vs. Load Current

ADP7118

10k

1k

100

10

1

1

10

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 33. Output Noise Spectral Density vs. Frequency, ILOAD = 10 mA

100k

10k

100µA

1mA

10mA

100mA

200mA

1k

100

10

1

1

10

100

1k

10k 100k

1M

10M

FREQUENCY (Hz)

Figure 34. Output Noise Spectral Density vs. Frequency, for Different Loads

100k

10k

1.8V

3.3V

5.0V

1k

100

10

1

1

10

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 35. Output Noise Spectral Density vs. Frequency for

Different Output Voltages

Rev. C | Page 11 of 23

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