GTLP6C817 查看數據表（PDF） - Fairchild Semiconductor

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产品描述 (功能)

生产厂家

GTLP6C817

Low Drive GTLP-to-LVTTL 1:6 Clock Driver

Fairchild Semiconductor 

Functional Description

The GTLP6C817 is a low drive clock driver providing LVTTL-to-GTLP clock translation, and GTLP-to-LVTTL clock transla-

tion in the same package. The LVTTL-to-GTLP direction is a 1:2 clock driver path with a single Enable pin (OEB). For the

GTLP-to-LVTTL direction the clock receiver path is a 1:6 buffer with a single Enable control (OEA). Data polarity is inverting

for both directions.

Truth Tables

Inputs

TTLIN

OEB

H

L

L

L

X

H

Inputs

GTLPIN

OEA

H

L

L

L

X

H

Outputs

OBn

L

H

High Z

Outputs

OAn

L

H

High Z

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