BU7245HFV-TR 查看數據表（PDF） - ROHM Semiconductor
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BU7245HFV-TR Datasheet PDF : 29 Pages
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BU7265G,BU7265SG,BU7205HFV,BU7205SHFV,BU7271G,BU7271SG,BU7245HFV,BU7245SHFV,
BU7411G,BU7411SG,BU7421G,BU7421SG,BU7475HFV,BU7475SHFV
Technical Note
●Schematic Diagram
VDD
Vbias
VDD
Vbias
IN+
IN+
class
class
IN-
AB control
OUT
IN-
AB control
OUT
Vbias
VSS
○Input-Output Full Swing
BU7265/BU7271/BU7205/BU7245 family
Vbias
VSS
○Ground Sense
BU7411/BU7421/BU7475family
Fig.162 Schematic Diagram
●Test circuit 1 NULL method
Parameter
VF
Input Offset Voltage
VF1
VDD, VSS, EK, Vicm Unit:[V]
Vicm
S1
S2
S3
VDD VSS
EK
BU7265
/BU7271
BU7205
/BU7245
BU7411
BU7421 Calculation
/BU7475
ON ON OFF 3 0 -1.5 3
3
2
1.8
1
Large Signal
Voltage Gain
Common-mode
Rejection Ratio
(Input Common-mode
Voltage Range)
VF2
-0.5
ON ON ON 3 0
1.5
1.5
1
0.9
2
VF3
-2.5
VF4
0
0
0
0
ON ON OFF 3 0 -1.5
3
VF5
3
3
2
1.8
BU7265/BU7271 ON ON OFF 1.8
Power Supply
Rejection Ratio
BU7205/BU7245 ON ON OFF 1.8
VF6
BU7421/BU7475 ON ON OFF 1.7 0 -0.9 0
0
0
0
4
BU7411
ON ON OFF 1.6
VF7
ON ON OFF 5.5
－ Calculation－
1. Input Offset Voltage (Vio)
2. Large Signal Voltage Gain (Av)
3 Common-mode Rejection Ratio (CMRR)
4. Power Supply Rejection Ratio (PSRR)
|VF1|
Vio =
[V]
1+Rf/Rs
Av = 20Log 2×(1+Rf /Rs) [dB]
| VF 2-VF 3|
CMRR = 20Log ⊿Vicm×(1+Rf /Rs) [dB]
|VF4-VF5|
PSRR = 20Log ⊿VDD×(1+Rf /Rs) [dB]
| VF 6-VF 7|
0.1[µF]
SW1
RS＝50[Ω] Ri=1[MΩ]
0.1[µF] 0.1[µF]
Vicm
RS＝50[Ω]
50[kΩ]
Ri=1[MΩ]
SW2
VDD
Rf=50[kΩ]
RK=500[kΩ]
EK
DUT
VSS
SW3
RL
VRL
RK=500[kΩ]
1000[pF]
0.01[µF]
15V
NULL
-15V
V VF
Fig.163 Test circuit 1
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2010.12 - Rev.A
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