STI5512 查看數據表（PDF） - STMicroelectronics

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STI5512

SET TOP BOX BACKEND DECODER WITH INTEGRATED HOST PROCESSOR

STMicroelectronics 

STi5512

1 IntroduFctiIoDn ENTIAL The STi5512 is one of the OMEGA family of integrated multimedia decoder engines for DVB set top box systems. It

offers a high level of integration by reducing the complete set-top box decoding chain from transport demultiplexing to

ON PAL/NTSC/SECAM encoder onto one chip. At the same time it dramatically enhances CPU and graphics performance,

C and cuts down total system memory cost.

The STi5512 integrates the functions of the MPEG decoder and the PAL/NTSC/SECAM encoder. This single device

includes the following subsystems, which are described in more detail below:

• A transport demultiplexor,

• A system microcontroller,

• A MPEG audio decoder,

• A MPEG video decoder,

• A PAL/NTSC/SECAM encoder.

The STi5512 minimizes system costs. The external memory interface module (EMI) contains a zero glue logic DRAM/

SDRAM controller and a low cost 32/16/8-bit EPROM interface. SDRAM is supported at the CPU clock rate, 60 MHz.

The SDRAM memory interface directly supports two 16-Mbit or one 64-Mbit 100MHz SDRAM providing the very high

bandwidths to support MPEG decoding and display, on-screen display (OSD) drawing and display, and general system

use. Furthermore the ST20 VL-RISC micro-core has the highest code density of any 32-bit CPU, leading to the lowest

cost program ROM.

The STi5512 is supported by a range of software and hardware development tools for PC and UNIX hosts including an

ANSI-C ST20 software toolset and the ST20 window based debugging toolkit.

Display

The STi5512 provides an enhanced range of display functions and features to improve the video display and add

background and foreground graphics and pictures. Features include:

• Five display planes - background color, still picture, decompressed video, on-screen display and sub-picture,

• Letterbox filtering,

• Anti-flutter and anti-flicker filters,

• 2- to 8-bits per pixel on-screen display with 24-bit color with anti-aliasing,

• Hardware cursor option,

• Display memory expandable to 64 Mbits of SDRAM,

• 2D BLT block move engine,

• Two additional display modes for full resolution source video using Frame based filtering for Luma and Chroma.

Video decoder

The video decoder fully supports MPEG-2 Main Profile/Main Level (MP@ML), and has the following features:

• A memory reduction architecture, allowing sharing of a single 16-Mbit SDRAM between MPEG decoding, micro and

transport functions.

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