ADA4096-2 查看數據表（PDF） - Analog Devices

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ADA4096-2

30 V, Micropower, Overvoltage Protection, Rail-to-Rail Input/Output Amplifier

Analog Devices 

Data Sheet

ADA4096-2

THEORY OF OPERATION

INPUT STAGE

VCC

R1

I1

R2

Q5

R5

D6

Q6

Q11

Q12

R7

I3

D10

Q20

D3

Q3

D4

+IN OVP

Q1

D2

–IN OVP

D1

VEE

Q4

Q7

Q2

I2

R3

Q8 C1

Q9

R4

C2

D9

Q18

Q13 Q14

Q10

D8

×1

Q15

D7

Q17

R6

Q16

D11

OUT

Q19

Figure 45. Simplified Schematic

Figure 45 shows a simplified schematic of the ADA4096-2. The

input stage comprises two differential pairs (Q1 to Q4 and Q5

to Q8) operating in parallel. When the input common-mode

voltage approaches VCC − 1.5 V, Q1 to Q4 shut down as I1 reaches

its minimum voltage compliance. Conversely, when the input

common-mode voltage approaches VEE + 1.5 V, Q5 to Q8 shut

down as I2 reaches its minimum voltage compliance. This

topology allows for maximum input dynamic range because the

amplifier can function with its inputs at 200 mV outside the rail

(at room temperature).

Although phase inversion persists for only as long as the inputs are

saturated, it can be detrimental to applications where the amplifier

is part of a closed-loop system. The ADA4096-2 is free from phase

inversion over the entire common-mode voltage range, as well as

the overvoltage protected range stated in the Absolute Maximum

Ratings section, Table 5. Figure 46 shows the ADA4096-2 in a

unity-gain configuration with the input signal at ±40 V and the

amplifier supplies at ±10 V.

T

As with any rail-to-rail input amplifier, VOS mismatch between

the two input pairs determines the CMRR of the amplifier. If

the input common-mode voltage range is kept within 1.5 V of

each rail, transitions between the input pairs are avoided, thus

1

improving the CMRR by approximately 10 dB (see Table 3 and

Table 4).

PHASE INVERSION

Some single-supply amplifiers exhibit phase inversion when

the input signal extends beyond the common-mode voltage

range of the amplifier. When the input devices become saturated,

the inverting and noninverting inputs exchange functions,

causing the output to move in the opposing direction.

CH1 10.0V CH2 10.0V

M2.00ms

T 34.20%

A CH1

Figure 46. No Phase Reversal

–3.6V

Rev. A | Page 15 of 20

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