HCPL-261A(2013) 查看數據表（PDF） - Avago Technologies
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HCPL-261A Datasheet PDF : 17 Pages
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HCPL-261A, HCPL-061A, HCPL-263A, HCPL-063A
HCPL-261N, HCPL-061N, HCPL-263N, HCPL-063N
HCMOS Compatible, High CMR, 10 MBd Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
The HCPL-261A family of optically coupled gates shown
on this data sheet provide all the benefits of the in-
dustry standard 6N137 family with the added benefit
of HCMOS compatible input current. This allows direct
interface to all common circuit topologies without
additional LED buffer or drive components. The Al-
GaAs LED used allows lower drive currents and reduc-
• HCMOS/LSTTL/TTL performance compatible
• 1000 V/µs minimum Common Mode Rejection (CMR)
at VCM = 50 V (HCPL-261A family) and 15 kV/µs
minimum CMR at VCM = 1000 V (HCPL-261N family)
• High speed: 10 MBd typical
• AC and DC performance specified over industrial
es degradation by using the latest LED technolo gy. On
temperature range -40°C to +85°C
the single channel parts, an enable output allows the de-
tector to be strobed. The output of the detector IC is an
open collector schottky-clamped transistor. The internal
shield provides a minimum common mode transient im-
munity of 1000 V/µs for the HCPL-261A family and 15000
V/µs for the HCPL-261N family.
• Available in 8 pin DIP, SOIC-8 packages
• Safety approval:
– UL recognized per UL1577 3750 Vrms for 1 minute
and 5000 Vrms for 1 minute (Option 020)
– CSA Approved
Functional Diagram
HCPL-261A/261N
HCPL-061A/061N
NC 1
8 VCC
– IEC/EN/DIN EN 60747-5-5 approved
HCPL-263A/263N
Applications
HCPL-063A/063N
• Low input current (3.0 mA) HCMOS compatible
ANODE 1 1
8 VCC version of 6N137 optocoupler
ANODE 2
7 VE
CATHODE 1 2
7 VO1 • Isolated line receiver
CATHODE 3
6 VO
CATHODE 2 3
6 VO2 • Simplex/multiplex data transmission
NC 4 SHIELD
5 GND
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
ON
OFF
ON
OFF
ENABLE
H
H
L
L
NC
NC
OUTPUT
L
H
H
H
L
H
ANODE 2
4
SHIELD
5
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
OUTPUT
L
H
GND •
•
•
•
•
Computer-peripheral interface
Digital isolation for A/D, D/A conversion
Switching power supplies
Instrumentation input/output isolation
Ground loop elimination
• Pulse transformer replacement
The connection of a 0.1 µF bypass capacitor between pins 5 and 8 is
required.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
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