TB62709FG 查看數據表（PDF） - Marktech Optoelectronics

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TB62709FG

TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC

Marktech Optoelectronics 

EXTERNAL RESISTANCE AND OUTPUT CURRENT VALUES

TB62709NG/FG

The following diagram shows application circuits.

Because operation may be unstable due to influences such as the electromagnetic induction of the wiring, the IC

should be located as close as possible to the LED.

The L−GND and P−GND of the IC are connected to the substrate in the IC.

Take care to avoid a potential difference exceeding 0.4V at two pins.

When executing the pattern layout, Toshiba recommends not including inductance components in the GND or

output pin lines, and not inserting capacitance components exceeding 50pF between the REXT and GND.

22

2005-10-06

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