74HC139DB-Q100 查看數據表（PDF） - NXP Semiconductors.

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74HC139DB-Q100

Dual 2-to-4 line decoder/demultiplexer

NXP Semiconductors. 

Nexperia

74HC139-Q100; 74HCT139-Q100

Dual 2-to-4 line decoder/demultiplexer

5. Pinning information

5.1 Pinning

+&4

+&74

( 

$ 

$ 

< 

< 

< 

< 

*1' 

Fig 5. Pin configuration SO16, SSOP16 and TSSOP16

 9&&

 (

 $

 $

 <

 <

 <

 <

DDD

5.2 Pin description

Table 2. Pin description

Symbol

1E, 2E

1A0, 1A1

1Y0, 1Y1, 1Y2, 1Y3

GND

2Y0, 2Y1, 2Y2, 2Y3

2A0, 2A1

VCC

Pin

1, 15

2, 3

4, 5, 6, 7

8

12, 11, 10, 9

14, 13

16

6. Functional description

Description

enable input (active LOW)

address input

output (active LOW)

ground (0 V)

output (active LOW)

address input

positive supply voltage

Table 3. Function table[1]

Control

Input

nE

nA1

nA0

H

X

X

L

L

L

L

L

H

L

H

L

L

H

H

Output

nY3

nY2

nY1

nY0

H

H

H

H

H

H

H

L

H

H

L

H

H

L

H

H

L

H

H

H

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.

74HC_HCT139_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 19 June 2014

© Nexperia B.V. 2017. All rights reserved

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