STPIC6C595MTR 查看數據表（PDF） - STMicroelectronics

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STPIC6C595MTR

Power logic 8-bit shift register

STMicroelectronics 

STPIC6C595

Figure 9. Reverse recovery current test circuits

Typical operating circuit

Figure 10. Source drain diode waveform

Note: 1 A) The VGG amplitude and RG are adjusted for di/dt = 10 A/μs. A VGG double-pulse train is

used to set IF = 0.1 A. where t1 = 10 μs, t2 = 7 μs and t3 = 3 μs

2 B) The drain terminal under test is connected to the TPK test point. All other terminals are

connected together and connected to the TPA test point.

3 C) IRM = maximum recovery current.

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