SC28L92 查看數據表（PDF） - NXP Semiconductors.
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SC28L92 Datasheet PDF : 73 Pages
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NXP Semiconductors
SC28L92
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
terminal 1
index area
A3 1
IP0 2
WRN 3
RDN 4
RxDB 5
n.c. 6
I/M 7
TxDB 8
OP1 9
OP3 10
OP5 11
OP7 12
SC28L92A1BS
(80xxx mode)
Transparent top view
Fig 7. Pin configuration for HVQFN48; 80xxx mode
terminal 1
index area
A3 1
IP0 2
R/WN 3
DACKN 4
RxDB 5
n.c. 6
I/M 7
TxDB 8
OP1 9
OP3 10
OP5 11
OP7 12
SC28L92A1BS
(68xxx mode)
Transparent top view
Fig 8. Pin configuration for HVQFN48; 68xxx mode
36 n.c.
35 CEN
34 RESET
33 X2
32 X1/CLK
31 RxDA
30 TxDA
29 OP0
28 OP2
27 OP4
26 OP6
25 n.c.
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36 n.c.
35 CEN
34 RESETN
33 X2
32 X1/CLK
31 RxDA
30 TxDA
29 OP0
28 OP2
27 OP4
26 OP6
25 n.c.
002aad363
SC28L92_7
Product data sheet
Rev. 07 — 19 December 2007
© NXP B.V. 2007. All rights reserved.
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