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零件编号
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74LVX112 查看數據表(PDF) - Fairchild Semiconductor
零件编号
产品描述 (功能)
生产厂家
74LVX112
Low Voltage Dual J-K Flip-Flops with Preset and Clear
Fairchild Semiconductor
74LVX112 Datasheet PDF : 7 Pages
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7
AC Electrical Characteristics
Symbol
Parameter
V
CC
T
A
= +
25
°
C
(V)
Min
Typ
Max
t
PLH
Propagation Delay
t
PHL
CP
n
to Q
n
or Q
n
2.7
3.3
±
0.3
7.5
12.0
11.0
16.7
8.5
11.0
10.0
15.0
t
PLH
Propagation Delay
t
PHL
PR or CLR to Q
n
or Q
n
2.7
3.3
±
0.3
7.0
11.5
10.1
14.3
6.7
10.2
9.7
13.5
t
W
Pulse Width
(CP or CLR or PR)
2.7
5.0
3.3
±
0.3 5.0
t
S
t
H
t
REC
Setup Time
(J
n
or K
n
to CP
n
)
Hold Time
(J
n
or K
n
to CP
n
)
Recovery Time
(CLR or PR to CP)
2.7
5.5
3.3
±
0.3 5.0
2.7
1.0
3.3
±
0.3 1.0
2.7
6.5
3.3
±
0.3 6.0
f
MAX
Maximum Clock
Frequency
2.7
90
140
85
115
3.3
±
0.3 110
150
90
120
t
OSLH
, Output to Output Skew
2.7
1.5
t
OSHL
(Note 3)
3.3
1.5
Note 3:
Parameter guaranteed by design. t
OSLH
=
|t
PLHm
–
t
PLHn
|, t
OSLH
=
|t
PHLm
–
t
PHLn
|
T
A
= −
40
°
C to
+
85
°
C
Min
Max
1.0
14.2
1.0
19.0
1.0
13.4
1.0
16.5
1.0
12.3
1.0
16.5
1.0
11.7
1.0
15.0
5.0
5.0
5.5
5.0
1.0
1.0
6.5
6.0
85
70
100
80
1.5
1.5
Units
ns
ns
ns
ns
ns
ns
MHz
ns
C
L
(pF)
15
50
15
50
15
50
15
50
15
50
15
50
50
Capacitance
Symbol
Parameter
T
A
= +
25
°
C
Min
Typ
Max
T
A
= −
40
°
C to
+
85
°
C
Min
Max
C
IN
Input Capacitance
C
PD
Power Dissipation
Capacitance (Note 4)
4
10
10
18
Note 4:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Units
pF
pF
www.fairchildsemi.com
4
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