MAX9002EUA 查看數據表（PDF） - Maxim Integrated

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MAX9002EUA

Low-Power, High-Speed, Single-Supply Op Amp + Comparator + Reference ICs

Maxim Integrated 

Low-Power, High-Speed, Single-Supply

Op Amp + Comparator + Reference ICs

To add hysteresis, use the following procedure:

Step 1: The device’s input bias current can be as high

as 80nA. To minimize error due to the input bias,

choose a value for R2 of 100kΩ (VREF / R2), which

allows a current of 12.33µA at the upper trip point.

Step 2: Choose the width of the hysteresis band. In this

example, choose 20mV for the added external hystere-

sis (VEHYST = 20mV). Total hysteresis = VEHYST +

VIHYST = 24mV.

R1 = R2 (VEHYST - 2VIHYST) / (VDD + 2VIHYST)

where IHYST is the device’s internal hysteresis.

Step 3: Determine R1. If VDD = 5V, then R1 = 319Ω.

Step 4: Check the hysteresis trip points. The following

equation represents the upper trip point (VIN(H)):

VIN(H) = [(R1 + R2) / R2] (VREF + VIHYST) = 1.238V

The lower trip point is 24mV lower than upper trip point.

VIN(L) = 1.238V - 0.024V = 1.214V.

Comparator Propagation Delay

The comparator’s propagation delay is a function of the

input overdrive voltage. Overdrive voltage is measured

from beyond the edge of the offset and hysteresis-

determined trip points (see Typical Operating

Characteristics for a graph of Propagation Delay vs.

Input Overdrive). High source impedance coupled with

the comparator’s input capacitance increases the prop-

agation delay. Large capacitive loads also increase the

propagation delay.

Shutdown (SHDN)

Shutdown is active-low enabled. The SHDN input for

the MAX9001/MAX9004 can be taken above the posi-

tive supply without an increase in the SHDN input cur-

rent, allowing them to be driven from independent logic

circuits powered from a different supply voltage.

However, the logic threshold voltage requirements

must be met for proper operation. If SHDN is left

unconnected, the device defaults to the enabled mode

through an internal 4MΩ pull-up to VDD. If SHDN is to

be left unconnected, take proper care to ensure that no

signals are coupled to this pin, as this may cause false

triggering.

In shutdown mode, all outputs are set to a high-imped-

ance state and the supply current reduces to 2µA.

Enable times for the op amp, comparator, and refer-

ence are 2µs, 100ns, and 16µs, respectively. Shutdown

delay times for the op amp, comparator, and reference

are 200ns, 100ns, and 1µs, respectively (Figure 7).

________________Application Circuits

Radio Receiver for Alarms

and Detectors

Figure 8’s circuit is useful as a front end for RF alarms.

An unshielded inductor is used with capacitors C1A,

C1B, and C1C in a resonant circuit to provide frequen-

cy selectivity. The op amp from a MAX9003 amplifies

the signal received. The comparator improves noise

immunity, provides a signal-strength threshold, and

translates the received signal into a pulse train. The

tuned LC circuit in Figure 8 is set for 300kHz. The lay-

out and routing of components for the amplifier should

be tight to minimize 60Hz interference and crosstalk

from the comparator. Metal shielding is recommended

to prevent RFI from the comparator or digital circuitry

from exciting the receiving antenna. The transmitting

SHDN

5V/div

AOUT

2V/div

COUT

5V/div

VREF

1V/div

5µs/div

AV = +1V/V, CAIN+ = 2.5V, CCIN+ = 2.5V

ANTENNA

VCC = 5V

MAX9003

0.1µF

C1A

390pF C1B

L1

0.01nF

33µH

C1C

50-100pF

AMP

9.1k

5.1M

0.1µF

20k

10k

10M

COMP

1

L1 x C1 = (2π fC) 2

1.230V REF

LAYOUT-SENSITIVE AREA,

METAL RFI SHIELDING ADVISED

Figure 7. Enable/Disable Response of Op Amp, Comparator,

and Reference to SHDN

Figure 8. Radio Receiver Application

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