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32475EIBZ 查看數據表(PDF) - Renesas Electronics

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32475EIBZ Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ISL32470E, ISL32472E, ISL32475E, ISL32478E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are VCC = 5V, TA = +25°C
(Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Note 16) TYP (Note 16) UNIT
Time to Shutdown
tSHDN (Note 13)
Full
60
160
600
ns
Receiver Enable from Shutdown to tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 10), Full
-
Output High
(Notes 13, 15)
-
2000
ns
Receiver Enable from Shutdown to tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 10), Full
-
Output Low
(Notes 13, 15)
-
2000
ns
NOTES:
8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
9. Supply current specification is valid for loaded drivers when DE = 0V.
10. Applies to peak current. See “Typical Performance Curves” beginning on page 5 for more information.
11. Keep RE = 0 to prevent the device from entering shutdown.
12. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering shutdown.
13. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are ensured not to enter
shutdown. If the inputs are in this state for at least 600ns, the parts are ensured to enter shutdown. See “Low Power Shutdown Mode” on page 17.
14. Keep RE = VCC and set the DE signal low time >600ns to ensure that the device enters shutdown.
15. Set the RE signal high time >600ns to ensure that the device enters shutdown.
16. Compliance to datasheet limits is assured by one or more methods: production test, characterization, and/or design.
17. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15µs at a 1% duty cycle).
18. See the Caution statement in “Absolute Maximum Ratings” on page 5.
Test Circuits and Waveforms
VCC DE
DI
Z
D
Y
VOD
RL/2
RL/2 VOC
VCC DE
DI
Z
D
Y
RL/2
VOD
VOC
RL/2
375Ω
VCM
375Ω
FIGURE 5A. VOD AND VOC
FIGURE 5B. VOD AND VOC WITH COMMON-MODE LOAD
FIGURE 5. DC DRIVER TEST CIRCUITS
FN7784 Rev 2.00
Feb 14, 2019
Page 9 of 21

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