EL5126 查看數據表（PDF） - Renesas Electronics
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EL5126 Datasheet PDF : 12 Pages
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EL5126
The maximum power dissipation actually produced by the IC is
the total quiescent supply current times the total power supply
voltage and plus the power in the IC due to the loads.
PDMAX = VS IS + VS - VOUTi ILOADi
when sourcing, and:
PDMAX = VS IS + VOUTi ILOADi
when sinking.
Where:
• i = 1 to total 8
• VS = Supply voltage
• IS = Quiescent current
• VOUTi = Output voltage of the i channel
• ILOADi = Load current of the i channel
By setting the two PDMAX equations equal to each other, we
can solve for the RLOAD's to avoid the device overheat. The
package power dissipation curves provide a convenient way to
see if the device will overheat.
POWER SUPPLY BYPASSING AND PRINTED CIRCUIT
BOARD LAYOUT
Good printed circuit board layout is necessary for optimum
performance. A low impedance and clean analog ground plane
should be used for the EL5126. The traces from the two
ground pins to the ground plane must be very short. The
thermal pad of the EL5126 should be connected to the analog
ground plane. Lead length should be as short as possible and
all power supply pins must be well bypassed. A 0.1µF ceramic
capacitor must be place very close to the VS, VREFH, VREFL,
and CAP pins. A 4.7µF local bypass tantalum capacitor should
be placed to the VS, VREFH, and VREFL pins.
APPLICATION USING THE EL5126
In the first application drawing, the schematic shows the
interconnect of a pair of EL5126 chips connected to give
8 gamma corrected voltages above the VCOM voltage, and
8 gamma corrected voltages below the VCOM voltage.
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FN7337 Rev 2.00
August 24, 2006
Page 10 of 12
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