MC33594 查看數據表（PDF） - NXP Semiconductors.

零件编号

产品描述 (功能)

生产厂家

MC33594

PLL Tuned UHF Receiver for Data Transfer Applications

NXP Semiconductors. 

Freescale SMeCm33ic59o4nductor, Inc.

DATA MANAGER

This block, only usable when in FSK modulation, has five purposes:

- ID detection,

- Header recognition,

- Clock recovery,

- Output data and recovered clock on SPI port,

- End-of-Message detection.

Table 2 details some ROMEO2 features versus the bits DME and SOE values.

Table 2: ROMEO2 features versus DME and SOE

DME MOD SOE

Timer

ROMEO2

kept in Run mode by

0

x

0

External control by

STROBE pin

1

Internal and external

control by STROBE pin

STROBE pin

0

External control by

STROBE pin

STROBE pin

1

1

1

Internal and external

control by STROBE pin

ID detection

and STROBE pin

Table 3 details some ROMEO2 features versus DME values.

Table 3: ROMEO2 features versus DME

DME MOD

SPI status

Data format

0

x

1

1

Disabled

Master when

RESETB=1

Bitstream

No clock

Data bytes

Recovered clock

Microcontroller

woken-up by

Raw data

Message Detection

word

Data clock

Output

MOSI

-

MOSI

SCLK

CLOCK GENERATOR

Typical crystal frequencies are:

- 9.864375MHz for 315MHz band,

- 13.580625MHz for 434MHz band.

Figure 11: Clock generation diagram

XTAL

Reference

Phase Frequency Detector

÷ 8 ÷ 11

÷ 32

UHF Oscillator

IF Filter Reference Clock

& Clock Recovery (FSK only)

315MHz band

434MHz band

© Motorola, Inc., 2002.

FMorOTMOoRrOeLIAnSfoErMmICaOtNioDnUCOTnORTShPisROPDroUdCuTSct,

Go to: www8.freescale.com

revision 1.1, 5 February 2002

Share Link: