DS1244/DS1244P
256k NV SRAM
with Phantom Clock
ORDERING INFORMATION
PART
PIN-PACKAGE
TEMP RANGE
DS1244Y-70
28-Module (740 mil)
0℃ to +70℃
DS1244YP-70
34-PowerCap*
0℃ to +70℃
DS1244W-120
28-Module (740mil)
0℃ to +70℃
DS1244W-120IND
28-Module (740mil)
-40℃ to +85℃
DS1244WP-120
34-PowerCap*
0℃ to +70℃
DS1244WP-120IND
34-PowerCap*
-40℃ to +85℃
*DS9034PCX (PowerCap) Required. (Must be ordered separately.)
TOP MARK
DS1244Y-70
DS1244YP-70
DS1244W-120
DS1244W-120IND
DS1244WP-120
DS1244WP-120IND
DESCRIPTION
The DS1244 256k NV SRAM with a Phantom clock is a fully static nonvolatile RAM (NV SRAM) (organized as 32k words by 8 bits)
with a built-in real-time clock. The DS1244 has a self-contained lithium energy source and control circuitry, which constantly
monitors Vcc for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched
on and write protection is unconditionally enabled to prevent garbled data in both the memory and real-time clock.
The phantom clock provides timekeeping information for hundredths of seconds, seconds, minutes, hours, days, date, months,
and years. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including correction for
leap years. The phantom clock operates in either 24-hour or 12-hour format with an AM/PM indicator.
PACKAGES
The DS1244 is available in two packages: 28-pin DIP and 34-pin PowerCap module. The 28-pin DIP style module integrates the
crystal, lithium energy source, and silicon all in one package. The 34-pin PowerCap module board is designed with contacts for
connection to a separate PowerCap (DS9034PCX) that contains the crystal and battery. This design allows the PowerCap to be
mounted on top of the DS1244P after the completion of the surface mount process. Mounting the PowerCap after the surface
mount process prevents damage to the crystal and battery due to the high temperatures required for solder reflow. The PowerCap
is keyed to prevent reverse insertion. The PowerCap module board and PowerCap are ordered separately and shipped in
separate containers. The part number for the PowerCap is DS9034PCX.
RAM READ MODE
The DS1244 executes a read cycle whenever (write enable) is inactive (high) and
(chip enable) is active (low). The
unique address specified by the 15 address inputs (A0-A14) defines which of the 32,768 bytes of data is to be accessed. Valid
data is available to the eight data-output drivers within tACC (access time) after the last address input signal is stable, providing that
and (output enable) access times and states are also satisfied. If and
access times are not satisfied, then data
access must be measured from the later occurring signal (
, rather than address access.
or ) and the limiting parameter is either tCO for
or tOE for
RAM WRITE MODE
The DS1244 is in the write mode whenever the and
signals are in the active (low) state after address inputs are stable.
The latter occurring falling edge of
or will determine the start of the write cycle. The write cycle is terminated by the
earlier rising edge of
or . All address inputs must be kept valid throughout the write cycle. must return to the high
state for a minimum recovery time (tWR) before another cycle can be initiated. The control signal should be kept inactive (high)
during write cycles to avoid bus contention. However, if the output bus has been enabled ( and active) then will
disable the outputs in tODW from its falling edge.
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