LTC4372I 查看數據表（PDF） - Analog Devices
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LTC4372I Datasheet PDF : 20 Pages
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LTC4372/LTC4373
APPLICATIONS INFORMATION
The LTC4372/LTC4373 operate from 2.5V to 80V and
withstands an absolute maximum range of –28V to 100V
without damage. In automotive applications the LTC4372/
LTC4373 can operate through load dump, cold crank and
two-battery jump starts, and survive reverse battery con-
nections while protecting the load.
A 12V/20A ideal diode application is shown in Figure 2.
The following sections cover power-on, ideal diode oper-
ation, shutdown and various faults that the LTC4372/
LTC4373 detect and act upon.
VIN = 12V
M1
BSC026N08NS5
IN
2UPU
GND
SOURCE GATE
LTC4372
SHDN
OUT
INTVCC
43723 F01
C1
100nF
VOUT
12V
20A
COUT
10μF
Figure 5 shows a typical OUT ripple at an ILOAD of 16A for
the circuit shown in Figure 2.
12V
IN, OUT
20mV/DIV
IN
OUT
IN, GATE
5V/DIV
12V
GATE
IN
50ms/DIV
IGATE(LEAKAGE) = 100nA
43723 F03
Figure 3. Regulating ΔVSD at
Low ILOAD = 1µA
12V
IN, OUT
20mV/DIV
IN
OUT
Figure 2. 12V/20A Ideal Diode with Reverse Input Protection
Power-On and Ideal Diode Operation
When power is applied, the initial load current flows
through the body diode of the MOSFET M1. When IN
exceeds the UVLO level of 2.1V and SHDN is low or UV is
high, the LTC4372/LTC4373 begin operation. An internal
charge pump asserts a 20µA pull-up on GATE to enhance
the MOSFET. To achieve a low supply current, the LTC4372/
LTC4373 employ a pulsed control style of operation where
the internal charge pump is not always on. Instead, the
charge pump periodically wakes up to recharge GATE after
it droops from leakage to keep ∆VSD ≤ 30mV. This pulsed
control creates a voltage ripple at OUT even with a stable
DC load. The amplitude of this ripple is dependent on gate
leakage, GATE capacitance, the load condition and the size
of the bypass capacitance at OUT. At low load or no-load
condition, this ripple can increase to 30mVPK–PK. Figure 3
shows a typical OUT ripple at an ultralight ILOAD of 1µA
for the circuit shown in Figure 2.
With a moderate DC load, the ripple amplitude is about
10mVpk-pk. Figure 4 shows a typical OUT ripple at a mod-
erate ILOAD of 2A for the circuit shown in Figure 2.
IN, GATE
5V/DIV
12V
GATE
IN
5ms/DIV
IGATE(LEAKAGE) = 100nA
43723 F04
Figure 4. Regulating ΔVSD at
Moderate ILOAD = 2A
12V
IN, OUT
20mV/DIV
IN
OUT
IN, GATE
5V/DIV
12V
GATE
IN
10ms/DIV
IGATE(LEAKAGE) = 100nA
43723 F05
Figure 5. Regulating ΔVGATE at
High ILOAD = 16A
Rev. 0
10
For more information www.analog.com
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