DSC400-4334Q0022 查看數據表（PDF） - Microchip Technology

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DSC400-4334Q0022

Crystal-less™ Configurable Clock Generator

Microchip Technology 

Microchip Technology Inc.

Absolute Maximum Ratings

Item

Supply Voltage

Input Voltage

Junction Temp

Storage Temp

Soldering Temp

ESD

HBM

MM

CDM

1000+ years of data retension on internal memory

Min.

-0.3

-0.3

-

-55

-

-

Max.

+4.0

VDD + 0.3

+150

+150

+260

4000

400

1500

Units

V

V

°C

°C

°C

V

DSC400-4334Q0022

Condition

40sec max.

Specifications (Unless specified otherwise: Ta = 25°C, VDD = 3.3V)

Parameter

Supply Voltage¹

Supply Current - Core²

Symbol Condition

VDD

IDDcore OE (1:2) = 0

All outputs are disabled

Frequency Stability

F

All temp and VDD ranges

Aging - first year

Aging - after first year

Startup Time³

Input Logic Levels

Input Logic High

Input Logic Low

Output Disable Time4

Output Enable Time4

Pull-Up Resistor

Fy1

Fy2+

tSU

1 year @ 25°C

Year 2 and beyond @ 25°C

T = 25°C

VIH

VIL

tDA

OE(1:2) transition from 1 to 0

tEN

OE(1:2) transition from 0 to 1

Rpu

All input pins have an internal pull-up

Min.

2.25

Typ.

Max.

Unit

3.6

V

40

44

mA

±50

±25

ppm

±5

ppm

< ±1/yr

ppm

5

ms

0.75 x VDD

-

-

V

0.25 x VDD

5

ns

20

ns

40

kOhms

Notes:

1. VDD pins should be filtered with 0.1µF capacitor connected between VDD and VSS.

2. The addition of IDDcore and IDDio provides total current consumption of the device.

3. tSU is time to 100ppm stable output frequency after VDD is applied and outputs are enabled.

4. Output Waveform figures below the parameters. See Output Waveform section.

February 13, 2017

5

4852

Revision 1.0

tcghelp@microchip.com

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