Microchip Technology Inc.
HCSL Outputs
Output Logic Levels
Output Logic High
Output Logic Low
VOH RL = 50Ohms
VOL
0.725
-
Pk to Pk Output Swing
Single-Ended
Output Transition Time³
20% to 80%
Rise Time
tR
RL = 50Ohms, CL = 2pF
200
Fall Time
tF
Frequency
f1
CLK1
f4
CLK4
Output Duty Cycle
SYM Differential
48
Supply Current - IO²
IDDio Per output at 125MHz
Period Jitter
JPER
Integrated Phase Noise JPH
200kHz to 20MHz @ 156.25MHz
100kHz to 20MHz @ 156.25MHz
12kHz to 20MHz @ 156.25MHz
HCSL Typical Termination Scheme
DSC400-4334Q0022
-
V
0.1
750
mV
400
ps
125
125
MHz
52
%
20
22
mA
2.5
psRMS
0.25
0.37
psRMS
1.7
2
RS is a series resistor implemented to match the trace impedance. Depending on the board layout, the value may range from
0 to 30Ohms
HCSL Output Waveform
February 13, 2017
4852
7
Revision 1.0
tcghelp@microchip.com