HMP8156 View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
HMP8156 Datasheet PDF : 33 Pages
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HMP8156
During I2C write cycles, the first data byte after the slave
address specifies the sub address, and is written into the
address register. Only the seven LSBs of the subaddress
are used; the MSB is ignored. Any remaining data bytes in
the I2C write cycle are written to the control registers, begin-
ning with the register specified by the address register. The
7-bit address register is incremented after each data byte in
the I2C write cycle. Data written to reserved bits within regis-
ters or reserved registers is ignored.
During I2C read cycles, data from the control register speci-
fied by the address register is output. The address register is
incremented after each data byte in the I2C read cycle.
Reserved bits within registers return a value of “0”. Reserved
registers return a value of 00H.
The HMP8156’s operating modes are determined by the
contents of its internal registers which are accessed via the
I2C interface. All internal registers may be written or read by
the host processor at any time. However, some of the bits
and words are read only or reserved and data written to
these bits is ignored.
Table 9 lists the HMP8156’s internal registers. Their bit
descriptions are listed in Tables 10-27.
TABLE 9. CONTROL REGISTER NAMES
SUB ADDRESS
(HEX)
00
01
02
03
04
05
06
07-0E
0F
10
11
12
13
14-1F
20
21
22
23
24
25
26-2F
30-7F
CONTROL REGISTER
Product ID
Output Format
Input Format
Video Processing
Timing I/O 1
Timing I/O 2
Aux Data Enable
Reserved
Host Control
Closed Caption_21A
Closed Caption_21B
Closed Caption_284A
Closed Caption_284B
Reserved
Start H_Blank Low
Start H_Blank High
End H_Blank
Start V_Blank Low
Start V_Blank High
End V_Blank
Reserved
Test and Unused
RESET
CONDITION
56H
00H
06H
A0H
00H
00H
00H
-
18H
80H
80H
80H
80H
-
4AH
03H
7AH
03H
01H
13H
-
-
BIT
NUMBER
FUNCTION
7-0
Product ID
TABLE 10. PRODUCT ID REGISTER
SUB ADDRESS = 00H
DESCRIPTION
This 8-bit register specifies the last two digits of the product number. It is a read-only
register. Data written to it is ignored.
RESET
STATE
56H
BIT
NUMBER
FUNCTION
7-5
Video Timing
Standard
4-3
Output Format
2-0
Reserved
TABLE 11. OUTPUT FORMAT REGISTER
SUB ADDRESS = 01H
DESCRIPTION
000 = (M) NTSC
001 = (M) NTSC with a 0 IRE setup; also called (NSM) NTSC
010 = (B, D, G, H, I) PAL
011 = (M) PAL
100 = (N) PAL
101 = combination (N) PAL; also called (CN) PAL
110 = reserved
111 = reserved
These bits must be set to “00” during (M, NSM) NTSC and (M, N, CN) PAL modes.
00 = Composite + Y/C
01 = reserved
10 = Composite + RGB (no sync on green)
11 = Composite + RGB (with sync on green)
RESET
STATE
000B
00B
000B
16
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